The present invention generally relates to processing a semiconductor substrate. In particular, the present invention relates to mitigating line-edge roughness along sidewalls of structures formed on a semiconductor substrate.
Achieving the objectives of miniaturization and higher packing densities continue to drive the semiconductor manufacturing industry toward improving semiconductor processing in every aspect of the fabrication process. Several factors and variables are involved in the fabrication process. For example, at least one and typically more than one photolithography process may be employed during the fabrication of a semiconductor device. Each factor and variable implemented during fabrication must be considered and improved in order to achieve the higher packing densities and smaller, more precisely formed semiconductor structures.
In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the photoresist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photoresist mask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photoresist mask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer. The resulting pattern image in the coating, or layer, may be at least one portion of a semiconductor device that contributes to the overall structure and function of the device.
Because the photoresist is used to form features on the semiconductor devices, the integrity of the photoresist must be maintained throughout the lithography process. That is, any flaw or structural defect which is present on a patterned photoresist may be indelibly transferred to underlying layers during a subsequent etch process wherein the photoresist is employed.
One example of an undesirable structural defect is line-edge roughness (LER). LER refers to the variations on the sidewalls of features which may originate from LER in the patterned photoresist. LER in photoresists can be caused by various factors such as LER on chrome patterns residing on the reticle, image contrast in a system for generating the photoresist pattern, a plasma etch process which can be used to pattern the photoresist, natural properties and/or weaknesses of the photoresist materials, and the photoresist processing method.
In addition, LER appearing in fabricated structures can occur as a result of damage to the patterned photoresist during an etch process, as illustrated in a partially fabricated semiconductor structure 10 in Prior Art FIG. 1. The semiconductor structure 10 includes a silicon substrate 20, a dielectric layer 30, and a photoresist layer 40 formed over the dielectric layer 30. As shown, plasma etchants employed to bombard exposed portions of the dielectric layer 30 through a patterned photoresist 40 inevitably attack the relatively soft photoresist material 50. In addition to removing exposed portions of the metalized layer, the energetic and reactive plasma species may alter the properties of the photoresist material, thus leading to LER 60 in the photoresist. The plasma effects can be more serious for 193 nm photoresists, which have less etch resistance than resists used at higher wavelengths such as 248 nm, 365 nm, etc. The condition may even worsen for wavelengths below 193 nm, such as 157 nm photoresists.
Moreover, as feature size decreases, line-edge roughness can interfere with accurate metrology and adversely affect device performance.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a novel monitoring system and method for enhancing consistency in photoresist material, thereby mitigating the occurrence of LER in photoresists. More specifically, the present invention provides a method to strengthen short wavelength photoresist films (e.g., 157 nm and 193 nm photoresists) before the short wavelength photoresist is used to etch exposed portions of an underlying dielectric layer. For example, after a short wavelength photoresist layer has been patterned with 193 nm or lower radiation, the patterned photoresist is exposed to and treated with a plasma under process conditions which are chosen to strengthen the photoresist rather than to etch the photoresist or any other layer exposed to the plasma treatment. This is accomplished in part by utilizing a plasma including at least one of helium (He), hydrogen (H2) and argon (Ar), or a combination thereof.
In particular, an image, which may correspond to any of a number of semiconductor structures (e.g., damascene trench, conductive line, gate, contact, and the like), is patterned onto a short wavelength photoresist using 193 nm or lower radiation. The layers of material beneath the photoresist are not etched during the patterning of the photoresist. After the short wavelength photoresist has been patterned, the patterned photoresist may be treated with a plasma in order to strengthen the photoresist without adversely affecting or etching any layer exposed to the plasma. Strengthening the photoresist before it is employed to etch portions of exposed, underlying layer mitigates the occurrence of line edge roughness (LER) in the photoresist, thereby mitigating mal-formed features in the underlying layer.
One aspect of the present invention relates to a method for mitigating LER. The method involves providing a semiconductor substrate having at least one dielectric layer formed thereon. A photoresist layer having a thickness from about 500 angstroms to about 5000 angstroms may be formed over the dielectric layer. An image can be patterned on the photoresist layer using short wavelength radiation, thereby exposing portions of the dielectric layer. Short wavelength radiation specifically includes about 193 nm light and about 157 nm light or less. The image may, for example, correspond to one or more trenches. After the photoresist has been patterned and before the exposed portions of the dielectric layer are etched through openings of the photoresist, the photoresist is exposed to a plasma selective to the patterned photoresist layer to strengthen the photoresist layer without substantially etching the exposed dielectric layer. The plasma may comprise at least one of helium, hydrogen and argon, or a combination thereof. Once treated, the exposed portions of the dielectric layer can be etched through the openings of the treated photoresist layer with an etchant selective to the dielectric layer. As a result of the plasma treatment, the treated photoresist layer is substantially resistant to the etching effects of the etchant, thereby mitigating the occurrence of LER in the photoresist.
Another aspect of the present invention relates to a method for mitigating the occurrence of LER during fabrication of a semiconductor device. The method involves forming a short wavelength photoresist layer over one or more dielectric layers, which are formed on a semiconductor substrate. The photoresist layer has a thickness from about 500 angstroms to about 5000 angstroms. The photoresist layer is patterned using about 193 nm or less wavelength radiation, thus exposing selected portions of the one or more underlying dielectric layers. Prior to etching the dielectric layer through openings of the patterned photoresist, the patterned photoresist undergoes a plasma treatment, which includes exposure to at least one of helium and argon, or a combination thereof. Exposure to the plasma treatment strengthens the patterned photoresist layer, making it resistant to the etching effects of etchants used in subsequent etch processes (e.g, to etch dielectric layers). However, the plasma treatment does not substantially etch the exposed portions of the dielectric layer or any other layer which may be exposed to it. The dielectric layer can be etched through the treated photoresist layer with an etchant, the etching effects of which do not substantially affect the treated patterned photoresist. Thus, the occurrence of LER during semiconductor fabrication is mitigated. Following the etch process, the treated photoresist layer can be stripped from the one or more underlying dielectric layers.
Yet another aspect of the present invention relates to a method for mitigating LER in situ during fabrication of a semiconductor device. The method includes forming a patterned photoresist layer over a semiconductor substrate having a silicon dioxide layer formed thereon. The patterned photoresist layer is formed using radiation no greater than 193 nm. At least a portion of the photoresist layer is patterned to expose portions of the silicon dioxide layer. After the photoresist is patterned and before the silicon dioxide layer is etched, the patterned photoresist layer is exposed to a plasma selective to the photoresist layer for a time sufficient to strengthen the photoresist and to make it resistant against etchants subsequently employed to remove portions of the silicon dioxide layer.
During this exposure, no other layers are etched or structurally altered by the plasma. The plasma may be at least one of hydrogen, helium and argon, or a combination thereof. It should be understood that the plasma is not employed as etchant or under etch process conditions. Following the plasma treatment and before the strengthened photoresist is used to etch the dielectric layer, a determination can be made as to whether the photoresist layer has been strengthened and/or affected by the plasma treatment. A photoresist monitor system may be employed to make this determination. The photoresist monitor system may also adjust parameters associated with the plasma treatment in order to increase the effectiveness and efficiency of the plasma treatment. An etchant is employed to etch the dielectric layer through the openings of the strengthened photoresist, whereby the etchant is selective to the dielectric layer. Moreover, the strengthened photoresist is resistant to the etching effects of the etchant and of subsequent etchants.
Still yet another aspect of the present invention relates to a method for mitigating LER in situ during fabrication of a damascene trench on a semiconductor device. The method involves forming a patterned photoresist layer over a semiconductor substrate having one or more dielectric layers deposited and formed thereon. At least a portion of the photoresist layer is patterned with short wavelength radiation no greater than 193 nm. The patterned photoresist layer is exposed to a plasma selective to the photoresist layer for a time sufficient to strengthen the photoresist and to make it resistant against subsequent etchants. During this exposure, no other layers are etched or significantly altered by the plasma. The plasma may be at least one of hydrogen, helium and argon, or a combination thereof. It should be understood that the plasma is not employed as etchant or under etchant process conditions and it is not intending to act or serve as an etchant. Using a photoresist monitor system, it can be determined whether the photoresist layer has been strengthened and/or whether it has been strengthened to a suitable level to be resistant to subsequent etching effects. The photoresist monitor system determines this by transmitting a pulse at or onto the photoresist layer, receiving the reflected pulse response from the photoresist layer and analyzing the reflected pulse response to determine a strength level of the photoresist layer and/or whether it has been strengthened (e.g., a xe2x80x9cyes/noxe2x80x9d form of a response).
Following an etch process wherein the strengthened photoresist layer is employed, the photoresist layer may be stripped from the one or more dielectric layers. A conformal barrier layer may be deposited over the dielectric layer and polished back such that selected portions of the barrier layer are removed from a top surface of the dielectric layers. The trench(es) may be filled with a suitable conductive material.
Still yet another aspect of the present invention relates to a system for mitigating the occurrence of LER in situ during fabrication of a semiconductor. The system contains a semiconductor wafer, on which at least one dielectric layer is formed. The wafer also includes a short wavelength photoresist layer formed over the dielectric layer which has been patterned using 193 nm or lower radiation and strengthened by a plasma treatment. The wafer may be located within a chamber, which is operatively connected to a photoresist monitoring system. The photoresist monitoring system transmits pulses onto the photoresist layer and receives reflected pulse responses from the patterned photoresist layerxe2x80x94which is the upper most layer and surface of the wafer. When exposed to a plasma treatment, which is controlled and regulated by the photoresist monitoring system, the patterned photoresist is structurally or physically altered such that reflected signals from a strengthened photoresist layer exhibit different characteristics than a non-treated (e.g., non-strengthened) photoresist layer. The photoresist monitoring system transmits an indicator to the system when the photoresist is substantially strengthened. Results of the signal reception from the photoresist and/or the indicator from the monitor can be displayed or communicated to an output device coupled thereto.
A plasma treatment system is operatively coupled to the photoresist monitoring system and to one or more plasma treatment components. The plasma treatment system receives feedback information from the photoresist monitoring system as it relates to the patterned photoresist layer. In particular, feedback information from the photoresist monitoring system corresponds to whether the photoresist is strengthened by the previous or most recent plasma treatment. Depending on the feedback information, the plasma treatment system may signal the one or more plasma treatment components to perform another treatment on the photoresist layer. In addition, the plasma treatment system may adjust one or more plasma treatment parameters according to the feedback information.